The present subject matter relates to semiconductor memories, and more specifically, to reducing uncorrectable memory errors in semiconductor memories by organizing error correction codewords.
Many types of semiconductor memory are known. Some memory is volatile and will lose its contents if power is removed. Some memory is non-volatile and will hold the information stored in the memory even after power has been removed. One type of non-volatile memory is flash memory which stores charge in a charge storage region of a memory cell. Some flash memory cells store a single bit of information per cell, but it is becoming more and more common for a flash memory cell to store more than one bit of information by setting a threshold voltage of the cell to one of 2n levels to store n bits of information.
Another type of memory is phase change memory (PCM). PCMs utilize a phase change material having a non-conductive amorphous state and a conductive crystalline state. A PCM cell may be put into one state or the other to indicate a stored value. By providing a potential across the PCM cell, the state of the PCM cell can be determined by measuring current flowing through the PCM cell. A PCM cell has a much higher on-current than off-current.
Some memory technologies are organized into cross-point arrays, where an array of memory cells are densely packed and are individually coupled to a unique pair of control lines. An individual memory cell is coupled to one row line that is oriented in one direction, such as a word line, and one column line that is oriented in a perpendicular direction, such as a bit line. Some memories may be organized as an array of cross-point arrays, where the individual cross-point arrays are very densely packed but may include some circuitry between the individual cross point arrays.
Some memory technologies may be sufficiently reliable that no error correction is necessary for many applications. In other technologies, the reliability of an individual memory cell may be low enough that an application of the memory may include redundant memory cells and error correction and/or detection information may be stored in the redundant memory cells. One common form of memory error correction is Hamming codes, where a set of parity bits is included that allow any single bit error in the codeword to be corrected. A Hamming code requires n+1 parity bits to protect 2n bits, so 6 bits may be used to protect a 32 bit data word. Many other types of error correction codes are well known, including, but not limited to, Reed-Solomon codes and Bose-Chaudhuri-Hocquenghem (BCH) codes. Depending on the size of the page, or codeword, of data, the number of error correcting codes that are included, and the type of codes chosen, one or more errors may be correctable or simply detected within a codeword.